The fabrication of silicon based solar cells requires a number of specialized processes to occur in a specific order. Generally these processes include single crystalline silicon ingots grown in crystal growing furnaces or cast into multi-crystalline blocks in “directional solidification” furnaces. The result of these processes are long “sausage-shaped” single crystal masses called ingots, or multi-crystalline blocks, from which thin slices of silicon are cut trans-versely with “wire saws” to form rough solar cell wafers. These wafers, whether made up of a single crystal or multiple crystals conjoined together, are then processed to form smooth wafers in the 150 to 330 micrometer range of thickness. Because of the scarcity of suitable silicon, the current trend is towards making the wafers thinner, typically 180 micrometers thick.
Finished raw wafers are then processed into functioning solar cells, capable of generating electricity by the photovoltaic effect. Wafer processing starts with various cleaning and etching operations, ending in a process called diffusion which creates a semi-conducting “p-n”, junction diode. Diffusion occurs at high temperatures in the presence of alternative phosphorous sources such as a sprayed liquid of dilute phosphoric acid or a vapor of phosphorous oxichloride (POCl3) created by bubbling nitrogen, N2, through liquid POCL3. The thus-doped Si forms the “emitter” layer of the photovoltaic cell, the layer that emits electrons upon exposure to sunlight (the normal photon source). These electrons are collected by a fine web of screen printed metal contacts that are sintered into the surface of the cell, as described in more detail below.
To enhance the ability to form low resistance screen-printed metal contacts to the underlying silicon p-n junction emitter layer, additional amounts of phosphorus are deposited onto the front surface of the wafer. The phosphorous is driven into the wafer via a high temperature diffusion process lasting up to 30 minutes. The extra “electrically active” phosphorus enables the low resistance contacts to be formed. However, the formation of such contacts is at the expense of a loss in cell efficiency. The cell efficiency loss arises as a result of electron-hole pairs generated at or near the surface through the absorption of higher energy but short wave length photons. These “blue light” photons quickly recombine and are lost, thereby eliminating their contribution to the power generation of the cell.
After diffusion and various cleaning and etching processes to remove unwanted semi-conductor junctions from the sides of the wafers, the wafers are coated with an anti-reflective coating, typically silicon nitride (SiN3), generally by plasma-enhanced chemical vapor deposition (PECVD). Between some of these processes, the wafers are dried in preparation for subsequent processes in low temperature drying ovens.
The SiN3 anti-reflective coating (ARC) is deposited to a thickness of approximately ¼ the wavelength of light of 0.6 microns. After ARC application, the cells exhibit a deep blue surface color. The ARC minimizes the reflection of incident photons having wavelengths around 0.6 microns.
The ARC SiNx coating is created in the PECVD process by mixing silane, SiH4, ammonia, NH3, and pure nitrogen, N2, gases in various concentrations in a high or low frequency microwave field. The hydrogen dissociates and diffuses very rapidly into the silicon wafer. The hydrogen has a serendipitous effect of repairing bulk defects, especially in multi-crystalline material. The defects are traps where electron-hole pairs can recombine thereby reducing cell efficiency or power output. During subsequent IR firing (see below), elevated temperatures (above 400° C.) will cause the hydrogen to diffuse back out of the wafer. Thus, short firing times are necessary to prevent this hydrogen from ‘out-gassing’ from the wafer. It is best that the hydrogen is captured and retained within the bulk material (especially in the case of multi-crystalline material).
The back of the solar cell is covered with an aluminum paste coating, applied by a screen printing process. This Al coating is first dried, then “fired” in an IR furnace to alloy it with the boron-doped silicon, thereby forming a “back surface field”. Alternately, the back surface aluminum paste is dried, then the wafer is flipped-over for screen-printing the front surface with silver paste in electrical contact patterns which are then also dried. The two materials, back surface aluminum and front surface silver contact pastes are then co-fired in a single firing step (the subsequent firing referred-to above). This co-firing saves one processing step.
The back surface typically is fully covered by the aluminum-based paste, while the front or top surface is screen printed with a fine network of silver-based lines connected to larger buss conductors to “collect” the electrons generated within the depleted region of the underlying doped Si emitter or near the surface. At the same time, the highest possible open area is left uncovered for the conversion of light into electricity. After these pastes have been dried, they are “co-fired”. The back surface aluminum alloys while the front surface paste is sintered at high speed and at high temperature in conveyor furnaces to form smooth, low ohmic resistance conductors on the front surface of the solar cell.
The instant invention is directed to such co-firing alloying/sintering processes and IR furnaces for such co-firing or other industrial processes. Currently available IR conveyor furnaces for such co-firing, alloying/sintering processes have a heating chamber divided into a number of regions. Each region is insulated from the outside environment with various forms of insulation, compressed insulating fiber board being the most common. Typically, the first zone, just inside the entrance is supplied with a larger number of infra-red (IR) lamps than the next 2 or 3 zones to rapidly increase the temperature of the incoming silicon wafers to approximately 425° C. to 450° C. This temperature is held for the next few zones to stabilize the wafers' temperature and insure complete burn-out of all organic components of the silver paste. The goal is to minimize all carbon content within the contacts, as carbon is understood to increase contact resistance.
Fast firing generally gives optimum results because the impurities do not have time to diffuse into the emitter. A high rate of firing is critical as the activation energy for the impurities to diffuse into the doped Si emitter region is generally lower than that for sintering the silver particles. To achieve this high firing rate, the wafers enter a high IR-intensity “spike” zone where the wafers' temperature is quickly raised into the range of 700-950° C., and then cooled, by a variety of means, until the wafers exit the furnace. The wafers are not held at the peak temperature. Rather, the peak width should be minimal, that is, the dwell short, while the ascending and descending rate slopes should be steep.
However, in the current state of the IR furnace art these desiderata are not met. Rather, the high intensity spike zone is simply a copy of the first zone wherein IR lamps are arrayed across the wafer transport belt, both above and below the belt and its support system. As a result, the current art suffers from highly inefficient use of the IR lamps that heat the wafers in the various processing zones, and an excess dwell characterized by a broad peak and shallow rate slopes temperature curve in the spike zone. Currently available furnaces are able to generate in the range of from about 80° C. to about 100° C./second rate of temperature rise in the spike zone. Since the peak temperature must approach 1000° C., the currently available rate of rise at the constant conveyor transport rate requires the spike zone to be physically long since the belt moves at a constant speed. The dwell peak of current processes is also too long.
The shallow curve/broad peak characteristic process limitation of currently available furnaces has deleterious effects on the metal contacts of the top surface which significantly limits cell efficiency as follows. The front surface silver paste typically consists of four phases:                (1) a vehicle phase which acts as a carrier for the powders and consists of volatile solvents and non-volatile polymers; the solvents evaporate during the drying step and the polymers are removed during the burn-out step; both steps occur before the actual peak zone firing step;        (2) a binder phase (organic resin and glass frit) which holds the paste to the substrate, dissolves the metal powder and provides adhesion to the substrate during firing;        (3) a functional phase (metallic particles that are either shaped as small spheres or as flakes); and        (4) modifiers (such as flux) which are small amounts of additives proprietary to the paste manufacture but which impact the required thermal profile used in firing.        
The solvent is evaporated completely in the dryer prior to firing. The resins must then be burned out completely to prevent carbon from interfering with the electrical quality of the metal contacts. This is achieved around 425° C. to 450° C. As the temperature continues to rise in the firing process, the glass frit begins to melt. The temperature of this aspect of the process depends on the composition of the glass frit and its glass transition temperature, Tg. Lead oxide is an important constituent of the frit since it dissolves the silver particles. Tg's are typically around 550° C.-600° C., at which the glass frit transitions from a solid, amorphous structure to one that is more fluid and can flow. Temperatures in the process continue to rise to 700° C.-950° C. range to sinter together the silver particles thus forming a lower resistance conductor.
It is important to accomplish this sequence quickly for several reasons. First, the frit glass must not flow too much, otherwise the screen-printed contact lines will widen and thereby reduce the effective collection area by blocking more of the cell surface from incident solar radiation. Secondly, the glass frit should not mix with the silver particles to any great extent since this will increase series resistance of the contacts. Finally, all of this material must etch through the SiNx anti-reflective (ARC) coating (about 0.15 micrometers in thickness or ¼ of the 0.6 micrometer target wavelength for reflection minimization) but not continue to drive through the “shallow”, doped Si emitter layer, previously formed by the diffusion of phosphorus onto the top surface of the p-type silicon. Emitters are generally 0.1 to 0.5 micrometers in thickness, but shallow emitters are generally in the 0.1 to 0.2 micrometer range.
Thus, to control the etch depth, the sinter must be quenched both quickly and thoroughly. Quenching, that is, preventing diffusion of the silver particles into the silicon below the emitter (forming crystallites) after etching the AR coating and creating good adhesion of the glass to the silicon substrate, must be accomplished by rapid cooling. This is critical. If the silver drives too deep into the doped Si emitter layer, the junction is shorted. The result is that the cell looses efficiency due to a short circuit path for the electrons produced. This is also known as a low shunt resistance property of the cell.
But in contradiction, it is also vitally necessary to slow rapid cooling in order to anneal the glass phase to improve adhesion. Taken together, the cooling curve looks like this: rapid cooling from the peak firing temperature to about 700° C., then slow cooling for annealing purposes, then rapid cooling to allow the wafer to exit the furnace at a temperature low enough to be handled by robotics equipment that must have rubberized suction cups to lift the wafers off the moving conveyor without marring the surface.
Since there are dimensional and IR lamp cost constraints, increasing lamp density in the spike zone is not generally a feasible solution. In addition, the peak temperature is held only for a few seconds in the spike zone and the descending thermal profile needs to be sharp. Increasing lamp density can be significantly counter-productive, in that the increased density easily results in a more gradual slope due to the reflection off the product and the internal surfaces of the spike zone.
Likewise, increasing the power to the lamps is not currently feasible because higher output can result in overheating of the lamp elements, particularly the external quartz tubes. Most furnaces are thermocouple controlled. Since the IR lamps are placed side by side, on the order of 1.25″ apart, each lamp heats adjacent lamps. When the thermocouples detect temperatures approaching 900° C., they automatically cut back power to the lamps. This results in lower power density, changes in the spectral output of the IR lamp emissions (hence a lower energy output), and results in the need to slow down the conveyor belt speed, thus slowing processing. In turn, this results in a ripple effect into the other zones, since the belt is continuous and slowing in one zone slows the belt in all zones, so that adjustments must be made in all zones to compensate. In turn, slowing upstream or downstream zones affects the firing zone. Overheating of lamps, e.g., due to thermocouple delay or failure, can cause the lamps to deform, sag and eventually fail. This deformation also affects uniformity of IR output delivered to the product.
It is important that the atmosphere be controlled in the furnace. While many metallization furnace operations operate in an air atmosphere, the atmosphere must be relatively controlled and laminar or minimally turbulent, as incoming air can introduce particulates that contaminate the substrate surfaces, and internal turbulence can disturb the product substrate wafers because they are so very thin, light and fragile, being on the order of 150-350 micrometers thick, In addition, at high temperatures, internal turbulence could cause lamp vibration leading to fatigue failure, or inconsistent or reduced output.
Accordingly, there is an unmet need in the IR furnace and IR firing process art to significantly improve net effective heating rate of conventional lamps, to provide better control and thermal profiles in the spike zone, to permit improved control of furnace temperature and atmosphere conditions, to improve quenching and annealing profiles, to improve the uniformity of heat in furnace zones, and to improve throughput of such furnaces, while accomplishing these goals on the same or reduced furnace foot-print.